The present invention is related to semiconductor package in which a semiconductor chip is joined with a new lead frame to make up a structure having an ultra-number of pins.
Conventionally, there is such a semiconductor package as shown in FIG. 1, which is capable of being mounted on a printed circuit board and the like via an organic board equipped with a projection electrode such as a soldering ball.
In FIG. 1, a semiconductor chip 51 is mounted on a surface of a multilayer organic wiring board 50 made of approximately 2 to 6 layers by using an organic material. Then, an electrode pad of this semiconductor chip 51 is connected to a wiring film 52 formed on the surface of the multilayer wiring board 50 by way of the wire bonding with employment of a gold line 53 and the like.
A soldering ball (projection electrode) 55 electrically connected via a through hole 54 to the wiring film 52 formed on the front surface of the multilayer organic wiring board 50 is provided on a rear surface of this multilayer organic wiring board 50. This soldering ball 55 is externally exposed through an opening of a solder resist film 56. Also, the semiconductor chip 51 is sealed together with the gold line 53 by employing sealing resin 57.
In the semiconductor package 58 with the above-described structure, the soldering ball 55 formed on the rear surface is connected to a printed circuit board 59. Generally speaking, since a large number of soldering balls 55 are arranged in a grid shape on the multilayer organic wiring board 50, this multilayer organic wiring board 50 may be referred to as a "ball grid array (BGA)", and also the semiconductor package 58 with employment of this multilayer organic wiring board 50 may be referred to as "BGA package".
However, in the above-described conventional semiconductor package 58, since the electrode pad of the semiconductor chip 51 is connected to the wiring film 52 of the multilayer organic wiring board 50 by employing wire bonding, there is a limitation when the wiring pitch is reduced. Also, for example, even in another semiconductor package called a TCP (tape carrier package) other than this BGA package, since a copper foil adhered to an insulating film base is etched away to form a lead, there is another limitation caused by narrowing the lead due to side etching. As a consequence, it is practically difficult to manufacture the TCP package with a large number of pins.
Accordingly, the applicant has proposed such semiconductor package made of the structure having ultra-number of pins by joining the novel lead frame to the semiconductor chip.
FIG. 2 is a cross-sectional view for representing an example of the semiconductor package made of the structure having an ultra-number of pins.
In the structure of the semiconductor package 60 shown in this drawing, a plurality of electrode pads 62 are formed around a peripheral portion of a surface (namely, lower surface of semiconductor chip in FIG. 2) of a semiconductor chip 61. Also, a reinforcement plate 63 is provided outside the semiconductor chip 61 under such a condition that this semiconductor chip 61 is surrounded by the reinforcement plate 63. A wiring film 65 is stacked via an insulating adhesive layer 64 on the reinforcement plate 63. This wiring film 65 is constituted by a plurality of leads 66 and an insulating film 67. The plural leads 66 are made of an inner lead 66a and an outer lead 66b. The insulating film 67 is used to cover and protect the outer lead 66b. A tip portion of the inner lead 66a is connected to the electrode pad 62 formed on the surface of the semiconductor chip, and further a soldering ball (projection electrode) 68 is formed via the insulating film 67 on the outer lead 66b. Also, sealing resin 69 is filled into the peripheral region of the semiconductor chip 61, and furthermore, a heat radiation plate 71 is joined via a heat conductive adhesive agent 70 to both the rear surface of the semiconductor chip 61 and the reinforcement plate 63.
Now, a brief description will be made of manufacturing steps for the above-described semiconductor package 60.
First, as indicated in FIG. 3A, when the lead frame is manufactured, a metal base 72 having a 3-layer structure is prepared. This metal base 72 is formed in such a manner that an aluminum film 74 is formed on a surface of a board made of either copper or a copper alloy (will be referred to as a "copper board" hereinafter), and then a nickel film 75 is formed on this aluminum film 74. Next, as shown in FIG. 3B, a plurality of leads 66 are formed on the surface of the metal base 72 by way of electrolytic copper plating. Then, as shown in FIG. 3C, a slit 76 is formed so as to define an outer shape of the lead frame with respect to each of chips. Subsequently, as indicated in FIG. 3D, the insulating film 67 is stacked on the leads 66, so that the wiring film 65 constructed of the plural leads 66 and the insulating film 67 is fabricated. At this time, a lead portion projected from the insulating film 67 becomes the inner lead 66a, and another lead portion which is covered/protected by the insulating film 67 becomes the outer lead 66b. Thereafter, as shown in FIG. 3E, an underlayer film made of nickel is formed on the outer lead 66b covered by the insulating film 67, and then a soldering material 68a is stacked on this underlayer film by way of the electrolytic plating. At this time, the soldering material 68a is formed as a mushroom shape.
Next, as represented in FIG. 4A and FIG. 4B, the copper board 73 of the metal base 72, the aluminum film 74, and the nickel film 75 are sequentially removed by way of the selective etching while an outer ring 77 is left. As a result, the respective leads 66 may be separated from each other. Next, as shown in FIG. 4C, the reinforcement plate 63 is joined via the insulating adhesive layer 64 to the surface of the outer lead 66b covered by the insulating film 67. Next, as indicated in FIG. 4D, a bump 78 is formed on a tip portion of each of the inner leads 66a extended from the insulating film 67.
The lead frame 79 before the semiconductor chip is assembled is completed by the above-described manufacturing steps.
Thereafter, when the semiconductor chip is assembled to the above-described lead frame 79, as represented in FIG. 5A, the tip portion of the inner lead 66a is connected via the bump 78 to the electrode pad 62 of the semiconductor chip 61. Next, as shown in FIG. 5B, the sealing resin 69 is filled into the peripheral region of the semiconductor chip 61 to be hardened. Next, as illustrated in FIG. 5C, the heat radiation plate 71 is joined via the heat conductive adhesive agent 70 to the rear surface of the semiconductor chip 61 and the reinforcement plate 63. Thereafter, as shown in FIG. 5D, the soldering material 68a which has been stacked by way of the electrolytic plating in the preceding steps for manufacturing the lead frame is formed by the reflow process to obtain a desirable soldering ball 68. Finally, as illustrated in FIG. 5E, the outer shape ring 77 is cut out, while setting an outer peripheral portion of the reinforcement plate 63 as a boundary, so that the semiconductor package 60 shown in FIG. 2 may be accomplished.
In this semiconductor package 60, since the leads 66 are formed on the metal base 72 by way of the electrolytic plating in the manufacturing steps of the lead frame 79, these leads can be made with the fine pattern. Therefore, the semiconductor package 60 with the structure having ultra-number of pins can be realized without being adversely influenced by the restrictions in the conventional semiconductor package. Also, since the heat radiation plate 71 is joined to the rear surface of the chip, the superior heat radiation characteristic can be achieved.
However, even in the above-described semiconductor package 60 with the structure having ultra-number of pins, there are the following difficulties:
(1) Although the heat radiation plate 71 capable of radiating heat energy is provided on the rear surface side of the semiconductor chip 61, there is a risk that sufficient heat radiation characteristics could not be achieved, assuming that the heat radiation amount of the semiconductor chip 61 is increased in connection with, for instance, an increase in operation speeds of CPUs in a future stage.
(2) In the case that the soldering ball 68 is formed by way of the electrolytic plating method, the inner peripheral array of the soldering ball 68 is made slightly large because of the uniform current distribution on the outer side of the chip. In the worst case, there is another risk that the size of the soldering ball is deviated from the ruled size.
The present invention has been made to solve the above-described problems, and therefore, has an object to provide such a semiconductor package comprising: a semiconductor chip in which a plurality of electrode pads are formed on a peripheral portion of a surface of the semiconductor chip, and an inside of a pad forming region thereof is used as an effective element region; a reinforcement plate provided under such a condition that this semiconductor chip is surrounded by the reinforcement plate; a plurality of leads constituted by an outer lead which is covered by an insulating film to be protected on this reinforcement plate, and an inner lead which is extended from this outer lead in an integral form, in which a projection electrode is provided on the outer lead and a tip portion of the inner lead is connected to the electrode pad of the semiconductor chip; and sealing resin filled into a peripheral region of the semiconductor chip wherein a conductor pattern is formed on the effective element region of the semiconductor chip; and the conductor pattern is covered by an insulating film to be protected; and further a projection electrode is provided on this conductor pattern.
In the semiconductor package with the above-described structure, the conductor pattern is formed on the effective element region of the semiconductor chip, and the projection electrodes are formed on this conductor pattern. As a consequence, when the semiconductor package is mounted on the packaging board, heat produced from the semiconductor a chip can be directly dissipated via the projection electrodes to the packaging board. Also, since the projection electrodes are provided on the reinforcement plate and the semiconductor chip, when the projection electrodes such as the soldering balls are formed by way of the electrolytic plating method, the fluctuation in the sizes of the soldering balls can be suppressed. Accordingly, the uniformed size of the balls can be realized.